MathWorks Releases Vision HDL Toolbox

The application provides an algorithm library for FPGAs and ASICs.

MathWorks has introduced the Vision HDL Toolbox to its Release 2015a. This provides pixel-streaming algorithms for the design and implementation of vision systems on FPGAs (field programming gate arrays) and ASICs (application-specific integrated circuits).

The Vision HDL Toolbox provides a library of image processing and computer vision algorithms that are not only suited for FPGAs and ASICs, but also automatically convert between frames of various sizes and pixels. Users can also use the HDL coder to generate readable and vendor-independent HDL code. The Toolbox can also connect with the HDL Verifier to integrate running algorithms with frame-based test models in MATLAB or Simulink,

FPGAs in particular are an increasingly popular platform for image processing and computer vision systems,” said John Zhao, marketing manager at MathWorks. “The new Vision HDL Toolbox has been created to help developers prototype and implement systems faster, with shortened design cycles, and more efficiently, through the ability to identify design errors early in the workflow and minimize the time needed for writing HDL code.”

For more information, visit MathWorks.

Sources: Press materials received from the company and additional information gleaned from the company’s website.

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