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Ethernet W5100: Embedded Internet IC

By DE Editors  

May 1, 2007

By DE Editors

iEthernet W5100 is a new 10/100 Ethernet controller IC designed for embedded applications. It includes a fully hardwired TCP/IP core as well as a PHY interface layer. 

Developed from the W3150A TCP/IP stack IC that contains a 10/100 Ethernet MAC, the W5100 allows engineers to off-load the burden of the TCP/IP stack into a second peripheral chip (complete with Ethernet MAC and PHY) with few peripheral components.

Designed by WIZnet (Korea; wiznet.co.kr) and distributed by Saelig Company (Pittsford, NY; saelig.com), this memory-mapped hardwired TCP/IP chip technology offers system robustness and up to 25Mbps for even low-end microcontrollers or non-OS systems. The TCP/IP algorithm guarantees line speed with on-the-fly processing architecture that is independent of the main processor, and takes away a main processor’s overhead by offloading TCP/IP tasks, enhancing overall system performance. Without the burden of TCP/IP protocols, simple 8-bit micros immediately have more power.

W5100’s hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP and PPPoE. Direct and indirect bus addressing is provided, as well as an SPI interface.

For more information, visit saelig.com.

 

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DE's editors contribute news and new product announcements to Digital Engineering. Press releases may be sent to them via [email protected].

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