Digital Engineering 24/7

Helping design and engineering professionals discover, evaluate and specify technologies and processes that shorten the design cycle and enable success.

NVIDIA to Sponsor Stanford Parallel Computing Research Lab

Formed to develop new techniques, tools, and training materials to allow software engineers to harness the parallelism of the multiple processors in every new computer.

Latest Engineering Computing News

Latest Engineering Computing Resources

By DE Editors  

May 6, 2008

By DE Editors

NVIDIA Corporation (Santa Clara, CA) announced that it is a founding member of Stanford University's new Pervasive Parallelism Lab (PPL), formed to exploit the capabilities of parallel computing. NVIDIA joins with AMD, HP, IBM, Intel, and Sun Microsystems in this venture.

The PPL will develop new techniques, tools, and training materials to allow software engineers to harness the parallelism of the multiple processors that are already available in virtually every new computer, according to the release.

NVIDIA's investment complements the company's ongoing strategy to solve some of the world's most computationally intensive problems with its market-leading GPUs and world-class tools and software. The company has enjoyed success to date with its Tesla line http://www.nvidia.com/tesla of GPU computing hardware solutions and, more importantly, with CUDAT technology, its programming environment that gives developers access to the massively parallel architecture of the GPU through the industry-standard C language.

Until recently, computer installations delivering massive parallelism could only be deployed in large-scale computer centers with hundreds to thousands of separate computer systems. With the recent introduction of many-core processors such as the GPU and the multi-core CPU, most new computer systems come equipped with multiple processors that require new software techniques to exploit parallelism. Without new software techniques, computer scientists are concerned that rapid increases in the speed of computing could stall.

From fundamental hardware to new user-friendly programming languages that will allow developers to exploit parallelism automatically, the PPL will allow programmers to implement their algorithms in accessible, domain-specific languages while at deeper, more fundamental levels of software, the system would do all the work for them in optimizing the code for parallel processing.

To read six examples of how NVIDIA GPU technology, combined with the CUDA programming environment, has delivered speed increases anywhere from 8 to 50 times over conventional processing technologies, go to NVIDIA.

 

Sources: Press materials received from the company and additional information gleaned from the company's website.

 

 

About DE Editors

DE Editors

DE's editors contribute news and new product announcements to Digital Engineering. Press releases may be sent to them via [email protected].

Follow DE
on Facebook
on Linkedin

Related Topics

Engineering Computing   News   All topics
 

Subscribe

Subscribe to our FREE magazine, FREE email newsletters or both!

Join over 90,000 engineering professionals who get fresh engineering news as soon as it is published.

Subscribe today

 
 

From our Sponsors

Meltio Takes Metal Additive to the Next Level
Meltio's DED technology enables industries to tailor and customize their solutions to create & repair metal parts.
Easing the Transition from ETO to CTO with Configuration Lifecycle Management
Manufacturers are discovering that the Configure-to-Order (CTO) model provides significant benefits when it comes to customization.
Siemens + Altair = The Next Chapter in Design and Simulation
With its acquisition of Altair, Siemens creates a unified simulation portfolio combining generative design with high-performance computing and AI workflows.