Power Math for Power Circuits

How Maple's 3D capabilities helped solve the mystery of gate resistance on shoot through.

How Maple's 3D capabilities helped solve the mystery of gate resistance on shoot through.

By Alan Elbanhawy

The mathematical software package Maple offers an exciting andeffective tool to study and understand physical phenomena such asmetal-oxide-semiconductor field-effect transistor (MOSFET) switching inpower circuits. At Fairchild Semiconductor in South Portland, ME, weexamined the effects of lumped and distributed gate resistance on thephenomenon of shoot through (also known as cross conduction) insynchronous buck converters (see Figure 1).

> > Figure 1: Synchronous buck converter.




Lumped Gate ESR Model

Lumped parameter models offer insight into the phenomenon and offerengineers a range of tools from the simple (evaluating MOSFETsusceptibility for cross-conduction) to the more complex (shoot throughanalysis with parasitic inductance) to evaluate the susceptibility of agiven synchronous rectifier for cross conduction in a synchronous buckconverter.

< < Figure 2:  Complete lumped equivalent circuit.


Figure 2 depicts the complete lumped circuit for a synchronousrectifier including inter-electrode capacitances, resistances andsource and gate inductances used for deriving the node equations to besolved for the shoot through voltages in this case.

Figure 3 shows the results of the solution as can be seenannotated. The simple model results in the lowest value of gate-sourcevoltage during shoot through. The more complicated model adds both theparasitic gate and source inductances and clearly results in highershoot through voltage.

> > Figure 3:  Observable gate-source voltage as predicted by the complete lumped model.



Adding the inter-electrode resistors results in the largest shootthrough voltage. The gate-source voltage internal to the die isdifferent from that between the external gate and source terminals onthe device and the peak value is larger and takes place at a differenttime. This leads to the conclusion that simple external observationsare not sufficient to determine whether cross conduction takes placewhen measured in the lab.

Figure 4 shows the current flowing in gate-drain capacitance(Cgd) and to a large extent in the gate driver for a drain-source risetime of 1ns. This large current of 16A will add to the drain current ofthe control MOSFET and aggravate the dynamic losses situation.

< <  Figure 4: Shoot through current as seen by the gate drive circuit for a rise time of 1ns.




 Distributed Parameter Model

In practice, all the MOSFET parameters are distributed over the entiresurface of the silicon device, which leads to an interesting situation. The equations that govern each cell on the device are unique to thatcell and hence, cross conduction will take place at different times andat a varying magnitudes.

Figure 5 depicts the complete model of a synchronous rectifier(within the dotted lines) used in the analysis with distributed gateresistance (Rg), gate-source capacitance (Cgs), and gate-draincapacitance (Cgd). The equivalent circuit used in the mathematicalanalysis using Maple was completed by dividing the die into tensegments (S1…S10). This assumed that each cell within a given segmenthas identical conditions of voltages and currents to each other cell.MOSFET segments S1 through S10 represent the synchronous rectifiersliced in ten smaller sections with proportionately scaled parameters.This was done to simplify the solution and help us get an idea aboutthe distribution of shoot through current and losses in each of thesegments.

> >  Figure 5:  Schematic of the circuit used to derive nodeequations for the distributed parameter  model.




Using the above assumption, Figure 5 depicts the circuit used for thederivations of the voltages and currents equations transform for thedistributed parameter case. We assume that the cells in each of the tensegments have identical conditions. A set of 11 simultaneousdifferential equations were derived and solved using Maple. Theresulting equations are too extensive and long to be displayed here.Figures 6 through 8 show the results in 3D.

Assuming a step voltage at the drain of the MOSFET, Figure 6 shows thegate-source voltage of one segment of the synchronous rectifier, thegate threshold voltage plane, and the drain current as a function oftime and Cgd. The current starts conducting after the gate-sourcevoltage level crosses the gate threshold voltage and spikes rapidly asthe voltage increases.

< <  Figure 6: Drain current and gate-source voltage  as function of gate-source Capacitance (Cgd).




Very small differences in the gate-to-source voltage results insignificant differences in drain currents. These results clearly showthat segment currents are not identical from one segment to the otherand segments farthest away from the gate pad conduct the majority ofthe drain current. The drain current in the remaining segmentsrepresents a very small percent of the total device drain current. Thisleads to the conclusion that a small percentage of the die surfacetakes the majority of the shoot through power losses while the rest ofthe die might not experience any shoot through whatsoever.

If the part of the die that is taking the majority of the powerdissipation can withstand its thermal effects without overheatingbeyond 150°C to 175°C under the worst case, no harm will be done. Asthe rise time increases to achieve lower dynamic power dissipation, thecross conduction problem is likely to get worse unless the MOSFETs aredesigned in some innovative way to eliminate shoot through altogether.Then and only then, would cross conduction no longer pose a challengeto the design engineer.

< < Figure 7: Drain current and voltage of one segment as a function of Cgs.




Figure 7 depicts the drain current and shoot through voltage of segmentnumber 10 as a function of the gate-source capacitance (Cgs). Noticethat among all the parameters considered, changes in Cgs have thelargest influence on the drain current and  consequently the shootthrough losses.

> > Figure 8: Drain current and voltage of one segment as a function of RG.



Figure 8 shows the effects of the gate ESR (Rg) on the drain currentand the shoot through voltage. One may observe that while the influenceof both Cgd and Cgs is limited to a very narrow window of typicalvalues, the effect of Rg is wide reaching along the entire range.

Using Maple allowed us to investigate the interaction of all theimportant parameters in 3D representations that helped us understandthe extent of the interdependencies. The 3D capability offers a verypowerful visualization tool of the complete results.  To achievethe same results using any other numerical simulation environmentrequires enormous amount of batch simulation, data compiling, andgraphing.

Alan Elbanhawy is a director at Fairchild Semiconductor International.He holds a B.S. in electrical engineering and has more than 38 years ofengineering experience in power supply design and RandD management.Send your comments about this article through e-mail by clicking here.Please reference “Power Math, October 2006” in your message.



INFO
Fairchild Semiconductor

South Portland, ME

Maple 10
Maplesoft

Waterloo, ONT, Canada

 

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