SynaptiCAD Releases VeriLogger Extreme, 2 in a Series

Supports encrypted models from Actel, Altera, and Xilinx.

Supports encrypted models from Actel, Altera, and Xilinx.

By DE Editors

SynaptiCAD has released an updated version of VeriLogger Extreme, a compiled-code Verilog simulation and debugging environment that adds support for encrypted IP models from all the major ASIC/FPGA vendors.

VeriLogger supports both binary-encrypted SmartModels based on the common SWIFT-based standard and the more recent encrypted source-code format (sometimes referred to as protected envelopes) added as part of the Verilog-2005 standard.

For a limited time, SynaptiCAD will be giving away free six-month licenses for VeriLogger Extreme. Free licenses will be available for both Linux and Windows versions of the simulator. SynaptiCAD’s simulator is being distributed without any code that slows down the simulator when run on larger designs, according to the company.

“Support for encrypted models has been a real stumbling block for free and low-cost simulator offerings in the past,” says Dan Notestein, president of SynaptiCAD. “This is the first time in over a decade that there’s been a free Verilog simulator offered that’s capable of simulating encrypted IP models from the major FPGA vendors.”

For more information, visit SynaptiCAD.

Sources:  Press materials received from the company and additional information gleaned from the company’s website.

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DE Editors

DE’s editors contribute news and new product announcements to Digital Engineering.
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