Synopsys Releases DesignWare ARC HS38 Processor

A single HS38 processor delivers up to 4200 DMIPS at speeds up to 2.2 GHz in typical 29-nanometer silicon, more than twice the performance than the previous generation. The ARC HS processor family utilizes the next-generation ARCv2 instruction-set architecture. Users can choose multicore configurations with an optional floating-point unit.

The HS38 processor is supported by the Synopsys MetaWare Development Toolkit, a solution for developing, debugging and optimizing embedded software on ARC processors. The toolkit includes an optimized C/C++ compiler, a debugger for maximum visibility and a fast instruction set simulator for pre-hardware development.

"With each new generation of electronic devices, SoC developers must satisfy the demand for additional performance and features with shrinking form factors and power budgets," said John Koeter, vice president of marketing for IP and prototyping at Synopsys. "Increasingly, we see Linux being used in high-end embedded applications. The HS38 enhances Synopsys' existing portfolio of ARC processors supporting high-level operating systems, bringing the high-performance capabilities of the ARCv2 architecture and HS family to designers of Linux-based embedded systems."

For more information, visit Synopsys DesignWare.

Sources: Press materials received from the company and additional information gleaned from the company’s website.