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Cadence Agentic AI Reduces SoC/System Engineering Time

Agentic AI spans multiple domains, including digital design, debug and verification, custom/mixed-signal design, printed circuit board and system design, Cadence reports.

Cadence Agentic AI Reduces SoC/System Engineering Time
AI-driven chip design inflection point. Image courtesy of Cadence.

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By DE Editors  

May 8, 2025

Cadence is presenting a vision for integrating agentic AI into semiconductor and system design at CadenceLIVE Silicon Valley 2025. It spans multiple domains, including digital design, debug and verification, custom/mixed-signal design, printed circuit board and system design.

The path to autonomous design, Cadence claims, is built on five progressive levels of AI:

Level 1. Optimization AI

The foundational layer inserts AI into verification and design processes, optimizing performance, area, cost, and schedule, while providing reinforcement learning and model prediction training.

Level 2. Conversational LLM

Introducing large language models (LLMs) into the workflow enables text-based queries and interactions, as well as runtime collateral generation, such as tool scripts, configurations, and code utilities. AI Assistants answer users' questions and create content.

Level 3. Complex Reasoning

This level enables AI agents to solve more complex tasks that require reasoning and chain-of-thought, such as planning, executing, and evaluating.

Level 4. Agentic Workflows

AI agents are connected to build agentic design workflows that can solve complex optimization problems across multiple tools.

Level 5. Autonomy

The goal is to enable a single designer to build an entire sysstem on a chip by generating all the collateral and then using optimization AI to build the design solution and iterate. All this can happen automatically with minimal design intervention, by leveraging agentic AI, according to Cadence.

Click here for full-size image of Al-Driven Chip Design Inflection Point.

Cadence.AI: Transforming Chip Design

Cadence products incorporate agentic AI into its tools to optimize throughput and accuracy. They use LLMs and retrieval augmented generation technology to facilitate text-based queries and prompt engineering in the workflow. Cadence tools feature a Silicon Agent framework that leverages the agentic workflows and AI platforms for creating IP and SoC design from high-level specification to detailed implementation.

Agentic AI's impact extends across industries, including data centers, high-performance computing, automotive, aerospace and defense, and robotics.

Cadence applies agentic AI across its five key AI platforms that make up Cadence.AI:

  • Verisium Platform – Agentic AI-driven verification optimizing and automating all phases of verification, including test planning and testbench generation.
  • Cadence Cerebrus AI Studio – A SoC agentic AI-design implementation tool that can help achieve ambitious PPA goals and reduce turnaround time.
  • Virtuoso Studio – Agentic AI-driven custom and analog IC design with support for systems, including RF, mixed-signal, and photonics.
  • Allegro X AI – Agentic AI-driven workflow transforms PCB design by reducing placement and routing tasks and allowing room for iteration and exploration.
  • Optimality Intelligent System Explorer – Agentic AI-driven multiphysics analysis and optimization.

"As we advance into smaller process nodes and tackle the complexities of modern SoC design, AI-driven chip design is no longer a luxury but a critical necessity," says Paul Cunningham, senior vice president and general manager of the System Verification Group at Cadence. "Cadence's agentic AI tools empower organizations to navigate the multitude of variables, optimize resources, and significantly enhance productivity."

For more about Cadence's AI capabilities, visit Cadence AI.

Sources: Press materials received from the company and additional information gleaned from the company’s website.

 
 

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