Streamlined Design, Analysis for Integrated 3D Integrated Circuits

Siemens Digital Industries Software has expanded its Electronic Design Automation (EDA) portfolio with new tools that the company says will help semiconductor design teams "address and overcome the complexity challenges associated with the design and manufacture of 2.5D and 3D Integrated Circuit (IC) designs."

Siemens’ new Innovator3D IC solution suite enables IC designers to efficiently author, simulate and manage heterogeneously integrated 2.5D/3D IC designs. In addition, Siemens’ new Calibre 3DStress software leverages advanced thermo-mechanical analysis to identify the electrical impact of stress at the transistor level. The company says the new solutions reduce risk and enhance the design, yield and reliability of complex, next generation 2.5D/3D IC designs.

“By delivering a stress-aware multiphysics analysis solution powered by Calibre 3DStress and driven by the Innovator3D IC solution suite, Siemens enables customers to overcome the complexities and risks associated with 3D IC designs,” said Mike Ellow, CEO, Siemens EDA, Siemens Digital Industries Software. “These capabilities are critical for our customers, allowing them to accelerate productivity and meet stringent design timelines by effectively eliminating the barriers of design complexity that traditionally impact design cycles.”

Siemens’ new Innovator3D IC solution suite delivers a predictable path for planning and heterogeneous integration, substrate/interposer implementation, interface protocol analysis compliance and data management of designs and design data IP. 
 
Built on an AI-infused user experience offering extensive multithreading and multicore capabilities to achieve optimal capacity and performance on 5+ million pin designs, the new Innovator3D IC solution suite is comprised of the Innovator3D IC Integrator, a consolidated cockpit for constructing a digital twin using a unified data model for design planning, prototyping and predictive analysis; the Innovator3D IC Layout solution for correct-by-construction package interposer and substrate implementation; the Innovator3D IC Protocol Analyzer for chiplet-to-chiplet and die-to-die interface compliance analysis; and the Innovator3D IC Data Management solution, for the work-in-progress management of designs and design data IP. 

Calibre 3DStress supports accurate, transistor-level analysis, verification, and debugging of thermo-mechanical stresses and warpage in the context of 3D IC packaging, allowing chip designers to evaluate how chip-package interaction will affect the functionality of their designs earlier in the development cycle. This foresight not only prevents future failures but also optimizes the design for better performance and durability.  
 
Building on the launch of Calibre 3DThermal in 2024, Calibre 3DStress expands the Multiphysics solution, reducing thermo-mechanical impacts, and delivering design and electrical behavior visibility earlier in the design process. Unlike package-level stress analysis tools, Calibre 3DStress uniquely detects transistor level stress to verify that neither packaging processes nor product functionalities will compromise circuit level performance.

Sources: Press materials received from the company and additional information gleaned from the company’s website.